1. Field of the Invention
This invention relates to a microcomputer provided with a flash memory and a method of storing a program into a flash memory, and more particularly to a microcomputer having a self-programming function of rewriting a program stored in a flash memory and a method of storing a program into a flash memory.
2. Description of the Related Art
A data processing apparatus which detects an interruption of rewriting processing of a flash memory to prevent a malfunction is conventionally known and disclosed in Japanese Patent Laid-Open No. 6865/1996.
FIG. 1 is a block diagram showing a general configuration of the data processing apparatus disclosed in the document mentioned above. Referring to FIG. 1, CPU 202 performs, upon initialization of such as changing of a program, rewriting processing of writing data block by block from ROM 203 into flash memory 204 through RAM 206 and writing a start code and an end code representative of a start/end of data in a corresponding relationship to the data into flash memory 204. CPU 202 copies contents of flash memory 204 into RAM 206 each time power supply is made available. Upon such copying, CPU 202 detects a write failure of the data in flash memory 204 based on the start code and the end code.
FIG. 2 shows a data structure of flash memory 204.
Flash memory 204 is divided into a plurality of blocks. A data train including data train 101, start code 103 and end code 104 is written into each of the blocks.
Program codes, a data table and other necessary data are included in the data area of data train 101. Start code 103 and end code 104 are predetermined arbitrary data and added to the start and the end of data train 101.
FIG. 3 is a flow chart illustrating processing of the conventional data processing apparatus when a normal program is started.
Data for one block are read out from flash memory 204 (step C1), and the start code and the end code are compared with respective expected values (step C2). Then, a result of the comparison in step C2 is confirmed (step C3). In such a case that rewriting of data of a block read formerly has been interrupted halfway, the end code or the start code and the end code have not been written as yet, and therefore, the start code and the end code do not coincide with the respective expected values. Thus, setting of flash memory 204 and RAM 206 is performed (step C4), and error processing is performed (step C5). Then, the normal program stored in RAM 206 is started for execution (step CB).
If it is confirmed in step C3 that the start code and the end code coincide with the respective expected values, then the block is written into RAM 206 (step C6). Then, it is confirmed whether the processing has been completed for all data or not (step C7). If the processing for all data has been completed, then the normal program stored in RAM 206 is started for execution (step C8). If it is confirmed in step C7 that the processing for all data has not been completed, the control returns to step C1 to repeat the operations of steps C1 to C6 until transfer of the data for the predetermined blocks to the RAM is completed.
As described above, in the conventional data processing apparatus, when it is confirmed that a start code and an end code coincide with respective expected values or after setting and error processing for the flash memory and the RAM is performed, a normal program is started, thereby preventing a malfunction of the program which arises from a write failure of the flash memory.
However, the conventional data processing apparatus which employs a flash memory has the following problems.
The first problem is that, because writing of a start code and an end code for detecting a write failure of the flash memory is performed only upon rewriting of the flash memory, a write failure cannot be detected if it occurs when the rewriting processing is interrupted in an initial stage.
For example, if an interruption occurs in rewriting processing in an initial stage of erasing processing of the flash memory, then the start code and the end code may possibly remain without being erased even though some of the program codes have been erased already. In this case, a malfunction may occur.
Also when all addresses remain without being erased, since the program prior to the rewriting remains as it is, the operation performed by the data processing apparatus is different from an expected operation.
The second problem is that, because a start code and an end code are added as part of the write data of a data area when they are provided on the boundary between blocks, it is difficult to produce a program since the CPU directly executes a program existing in the flash memory. Specifically, a computer system sometimes has a configuration such that a reset vector or an interrupt vector is fixed to a particular address. In a computer system of this type, if a reset vector or an interrupt vector is fixed to an address into which a start code or an encode should be stored, a program cannot be produced.
Further, although a conventional data processing apparatus is configured to read a program into the RAM once and then execute the program, when it employs a computer having a built-in memory like a single chip microcomputer, a RAM for storing a program to be executed must be prepared additionally for the data processing apparatus, resulting in a higher cost for the data processing apparatus.
The conventional data processing apparatus has a further problem that much time is required to start a normal processing program since the program is transferred from the flash memory to the RAM.